job description
Join MSPHitect Sdn Bhd as a SoC DFX SMS Engineer and play a pivotal role in designing cutting-edge SRAM-based solutions for next-generation System-on-Chip (SoC) architectures. This is a unique opportunity to work on high-impact projects in a dynamic, innovative environment, contributing to the development of advanced semiconductor technologies.
Based in the vibrant and inspiring locations of Bali (Canggu, Ubud, Denpasar, Jimbaran, Nusa Dua, Kuta, or Badung), youâll collaborate with a global team of experts to optimize memory designs for performance, power efficiency, and reliability. Your expertise in DFX (Design for Excellence) and SMS (Silicon Manufacturing Solutions) will drive the success of our most ambitious SoC initiatives.
We offer a competitive salary package, a collaborative work culture, and the chance to make a lasting impact in the semiconductor industry. If youâre passionate about SRAM design, DFX methodologies, and SoC integration, weâd love to hear from you!
Responsibility
- Design, develop, and optimize SRAM memory arrays for high-performance SoC applications, ensuring compliance with DFX and SMS standards.
- Collaborate with cross-functional teams (R&D, verification, and manufacturing) to implement Design for Testability (DFT), Design for Manufacturability (DFM), and Design for Yield (DFY) methodologies.
- Perform timing, power, and area (TPA) analysis to balance performance with efficiency in SRAM designs.
- Develop and validate SMS flows to enhance silicon manufacturing processes and improve yield.
- Troubleshoot and resolve SRAM-related silicon failures through root-cause analysis and corrective design adjustments.
- Create and maintain documentation, specifications, and design guidelines for SRAM and DFX implementations.
- Stay updated with emerging trends in semiconductor memory design and propose innovative solutions to enhance product competitiveness.
- Support pre-silicon and post-silicon validation to ensure robust SRAM performance in real-world conditions.
Qualifications
- Bachelorâs or Masterâs degree in Electrical Engineering, Electronics Engineering, or a related field with a focus on semiconductor design.
- Minimum 3+ years of experience in SRAM design, DFX, or SMS within the semiconductor industry.
- Proficiency in CAD tools such as Cadence, Synopsys, or Mentor Graphics for memory design and verification.
- Strong understanding of CMOS process technologies, memory architectures, and DFX methodologies (DFT, DFM, DFY).
- Experience with static timing analysis (STA), power analysis, and yield optimization techniques.
- Familiarity with scripting languages (Python, Perl, or Tcl) for automation in design flows.
- Excellent problem-solving and analytical skills with a detail-oriented approach to silicon debugging.
- Ability to work in a fast-paced, collaborative environment and communicate technical concepts effectively.