job description
Join Infineon Technologies as a Senior Staff Package Definition Engineer and play a pivotal role in shaping the future of semiconductor packaging. In this high-impact position, you will lead the end-to-end development of cutting-edge package solutions for new products and emerging technologies, from conceptualization and feasibility analysis to full-scale realization.
Based in the vibrant and innovative hub of Denpasar, Bali, you will collaborate with cross-functional teams including Business Units (BU), Front-End (FE) engineering, and R&D to deliver packaging solutions that meet stringent performance, reliability, and cost targets. Your expertise will directly influence the next generation of Infineonās industry-leading semiconductor products, powering applications in automotive, industrial, and consumer electronics.
This is a unique opportunity to combine technical leadership with creative problem-solving in a dynamic, global environment. If you are passionate about semiconductor packaging innovation and thrive in a role that bridges technology and business needs, we want to hear from you.
Responsibility
- Lead the definition and development of advanced semiconductor package solutions from concept to mass production, ensuring alignment with product requirements and technology roadmaps.
- Conduct comprehensive feasibility studies, risk assessments, and cost-benefit analyses for new packaging concepts and materials.
- Collaborate with cross-functional teams (R&D, FE/BE engineering, operations) to optimize package designs for performance, reliability, and manufacturability.
- Drive the selection and qualification of packaging materials, processes, and suppliers to meet technical and commercial targets.
- Develop and maintain package design guidelines, specifications, and documentation in compliance with industry standards (e.g., JEDEC, IPC).
- Identify and mitigate packaging-related risks (thermal, mechanical, electrical) through simulation, prototyping, and testing.
- Support failure analysis and root-cause investigations for packaging-related issues, implementing corrective actions.
- Stay abreast of emerging packaging technologies (e.g., fan-out, 2.5D/3D, advanced substrates) and assess their applicability to Infineonās product portfolio.
Qualifications
- Masterās or PhD degree in Electrical Engineering, Materials Science, Mechanical Engineering, or a related field.
- Minimum 8+ years of experience in semiconductor packaging development, with a focus on package design, materials, or process engineering.
- Proven track record in leading package definition projects from concept to production, preferably in automotive or industrial semiconductor applications.
- Deep technical expertise in packaging technologies (e.g., QFN, BGA, WLCSP, SiP) and materials (e.g., mold compounds, substrates, underfills).
- Strong knowledge of reliability testing (e.g., thermal cycling, drop test, HTOL) and failure analysis techniques.
- Proficiency in CAD tools (e.g., Ansys, COMSOL) and simulation software for thermal/mechanical modeling.
- Excellent project management and stakeholder communication skills, with the ability to influence cross-functional teams.
- Familiarity with semiconductor industry standards (JEDEC, IPC, AEC-Q) and quality systems (ISO/TS 16949).