job description
Join Micron Semiconductors as a Senior Engineer in NAND Wafer-Level Reliability & Design and play a pivotal role in shaping the future of memory technology. In this dynamic position, you will define, develop, and implement cutting-edge NAND Flash reliability test flows to evaluate product performance, mitigate risks, and ensure long-term durability against extrinsic and intrinsic reliability challenges.
Based in the vibrant tech hub of Badung, Bali, you’ll collaborate with cross-functional teams to drive innovation in semiconductor design, leveraging your expertise to enhance product robustness and accelerate time-to-market. This is a unique opportunity to contribute to industry-leading solutions while enjoying the work-life balance of one of the world’s most sought-after destinations.
Micron is a global leader in memory and storage solutions, and we’re looking for a visionary engineer to help us push the boundaries of what’s possible in NAND technology.
Responsibility
- Define and execute wafer-level reliability test methodologies for NAND Flash products to assess endurance, retention, and failure mechanisms.
- Develop and optimize test flows, stress conditions, and data analysis frameworks to identify reliability risks early in the product lifecycle.
- Collaborate with design, process, and product engineering teams to implement corrective actions and improve product robustness.
- Analyze silicon-level failure data using statistical tools and root-cause analysis to drive continuous improvement.
- Author and present technical reports and reliability assessments for internal stakeholders and customers.
- Stay abreast of emerging NAND technologies and industry trends to proactively address future reliability challenges.
- Mentor junior engineers and contribute to knowledge sharing across the reliability team.
- Support yield enhancement initiatives by correlating reliability data with manufacturing processes.
Qualifications
- Bachelor’s or Master’s degree in Electrical Engineering, Materials Science, Physics, or a related field with 5+ years of experience in semiconductor reliability, NAND Flash, or memory design.
- Proven expertise in wafer-level reliability testing, including HTOL, TDDB, and endurance/retention stress tests.
- Strong understanding of NAND Flash architecture, cell operations, and failure mechanisms (e.g., charge trapping, oxide breakdown).
- Proficiency in data analysis tools (Python, JMP, R, or similar) and statistical methods for reliability modeling.
- Experience with FA (Failure Analysis) techniques and collaboration with FA labs to debug silicon issues.
- Excellent problem-solving and communication skills, with the ability to present complex technical concepts to diverse audiences.
- Familiarity with semiconductor fabrication processes and their impact on reliability is a plus.
- Self-motivated with a passion for innovation and a track record of driving impactful reliability improvements.