job description
Are you a seasoned Senior Analog Layout Engineer with a passion for cutting-edge IC design? Join our dynamic team in Bali and contribute to groundbreaking projects in the semiconductor industry. We are seeking a highly skilled professional with 3+ years of experience in analog IC layout design, technical problem-solving, and innovative solutions.
In this role, you will collaborate with cross-functional teams to develop high-performance analog circuits, ensuring optimal layout design and adherence to industry standards. This is a unique opportunity to work in a vibrant, international environment while advancing your career in a rapidly evolving field.
If you thrive in a challenging yet rewarding setting and are eager to make a significant impact, we invite you to apply and become part of our innovative team.
Responsibility
- Design and implement analog IC layouts using industry-standard tools (e.g., Cadence Virtuoso).
- Collaborate with circuit designers to optimize layout for performance, power, and area.
- Ensure compliance with design rules, reliability standards, and manufacturing constraints.
- Perform layout verification, including DRC, LVS, and ERC checks.
- Troubleshoot and resolve layout-related issues to meet project deadlines.
- Mentor junior engineers and provide technical guidance on layout best practices.
- Stay updated with emerging trends and technologies in analog IC design.
Qualifications
- Bachelor's or Master's degree in Electrical Engineering, Electronics, or a related field.
- Minimum of 3+ years of experience in analog IC layout design.
- Proficiency in EDA tools such as Cadence Virtuoso, Mentor Graphics, or Synopsys.
- Strong understanding of analog circuit principles and semiconductor manufacturing processes.
- Experience with layout verification tools (DRC, LVS, ERC).
- Excellent problem-solving skills and attention to detail.
- Ability to work independently and collaboratively in a team environment.