job description
Join Micron Semiconductors in Bali and lead the future of semiconductor packaging innovation. As a Principal/Staff Engineer in Advanced Packaging Wafer Level Technology, you will drive cutting-edge solutions in wafer-level packaging, collaborating with global teams to push the boundaries of semiconductor technology. This role offers a unique opportunity to work in a dynamic, tropical environment while contributing to industry-leading advancements.
Micron is a global leader in memory and storage solutions, and this position is pivotal in shaping next-generation packaging technologies. You will work in our state-of-the-art facility in Bali, leveraging your expertise to optimize processes, enhance yield, and develop scalable solutions for high-performance semiconductor devices.
If you are passionate about innovation, thrive in collaborative environments, and want to make an impact in the semiconductor industry, this is the role for you. Enjoy the benefits of working in Bali’s vibrant tech hub while advancing your career with a Fortune 500 company.
Responsibility
- Lead the development and optimization of wafer-level packaging processes to enhance performance, reliability, and yield.
- Collaborate with cross-functional teams, including R&D, manufacturing, and quality assurance, to drive innovation in semiconductor packaging.
- Design and implement advanced packaging solutions for next-generation memory and storage products.
- Conduct feasibility studies, risk assessments, and process simulations to ensure scalable and cost-effective manufacturing.
- Mentor junior engineers and provide technical leadership in advanced packaging technologies.
- Work closely with global teams to align packaging strategies with Micron’s roadmap and industry trends.
- Develop and maintain documentation, including process specifications, technical reports, and patents.
- Drive continuous improvement initiatives to enhance efficiency, reduce defects, and optimize production costs.
Qualifications
- PhD or Master’s degree in Electrical Engineering, Materials Science, Mechanical Engineering, or a related field.
- Minimum of 10 years of experience in semiconductor packaging, with a focus on wafer-level technologies.
- Proven expertise in advanced packaging processes, including fan-out wafer-level packaging (FOWLP), through-silicon vias (TSV), and hybrid bonding.
- Strong background in process development, characterization, and failure analysis.
- Experience with statistical process control (SPC), design of experiments (DOE), and data-driven decision-making.
- Excellent problem-solving skills and the ability to lead complex technical projects.
- Strong communication and collaboration skills, with experience working in global teams.
- Familiarity with industry standards and best practices in semiconductor packaging.