job description
Join Zerro Power Systems Pte Ltd as a Senior FPGA Engineer and lead cutting-edge digital design projects in the heart of Bali’s thriving tech hub. This role is perfect for a hands-on expert in Xilinx Vivado who thrives on implementing and validating high-performance FPGA solutions for power systems, embedded controls, and real-time signal processing.
As part of our innovative team, you’ll collaborate with cross-functional engineers to develop next-generation hardware accelerators, optimize logic designs for speed and efficiency, and ensure seamless integration with embedded software. Your expertise will drive advancements in low-latency, high-reliability systems that power mission-critical applications.
Based in Canggu, Bali, this position offers a dynamic work environment where creativity meets technical excellence. Enjoy a competitive salary, a culture of innovation, and the opportunity to shape the future of power electronics and digital design.
Responsibility
- Design, develop, and optimize FPGA-based solutions using Xilinx Vivado for high-speed digital signal processing and control systems.
- Implement and validate RTL designs (VHDL/Verilog) with a focus on performance, power efficiency, and resource utilization.
- Conduct timing analysis, synthesis, and place-and-route to meet strict latency and throughput requirements.
- Collaborate with hardware and software teams to integrate FPGA modules with embedded systems, microcontrollers, and external interfaces (e.g., PCIe, Ethernet, SPI).
- Develop and execute testbenches and verification plans (UVVM, SystemVerilog) to ensure design robustness and compliance with industry standards.
- Debug and resolve complex FPGA-related issues using tools like ChipScope, ILA, and logic analyzers.
- Document design specifications, test reports, and user guides for internal and client stakeholders.
- Stay ahead of industry trends in FPGA technology, including AI acceleration, high-level synthesis (HLS), and adaptive computing.
Qualifications
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
- Minimum 5+ years of hands-on experience in FPGA design and development with Xilinx Vivado (Vitis experience is a plus).
- Proficiency in HDL languages (VHDL/Verilog) and FPGA design methodologies (e.g., pipelining, parallel processing).
- Strong understanding of digital design concepts, including clock domain crossing, synchronization, and memory interfaces (DDR, BRAM).
- Experience with high-speed protocols (e.g., PCIe, 10G Ethernet, JESD204B) and IP core integration.
- Familiarity with scripting languages (Python, Tcl) for automation and tool customization.
- Knowledge of embedded systems, C/C++, and hardware-software co-design is advantageous.
- Excellent problem-solving skills and the ability to work in a fast-paced, collaborative environment.